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Microchip Technology /ATSAMV71N21 /GMAC /IERPQ[0]

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Interpret as IERPQ[0]

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RCOMP)RCOMP 0 (RXUBR)RXUBR 0 (RLEX)RLEX 0 (TFC)TFC 0 (TCOMP)TCOMP 0 (ROVR)ROVR 0 (HRESP)HRESP

Description

Interrupt Enable Register Priority Queue (index = 1) 0

Fields

RCOMP

Receive Complete
RXUBR

RX Used Bit Read
RLEX

Retry Limit Exceeded or Late Collision
TFC

Transmit Frame Corruption Due to AHB Error
TCOMP

Transmit Complete
ROVR

Receive Overrun
HRESP

HRESP Not OK

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data